1. Field of the Invention
This invention relates generally to data communications and more particularly to deskewing circuits for deskewing multiple pipelined signals.
2. Description of the Related Art
Personal computers (PCs) have gained widespread use in recent years primarily because they are inexpensive and yet powerful enough to handle computationally intensive user applications. The data storage and data sharing capabilities of PCs are often expanded by coupling a group of such computers to peripheral devices such as disk drives, tape drives, and printers. These peripheral devices and the personal computers are interconnected through a single communications network, such as a local area network.
The Small Computer System Interface (SCSI) standard, which is specified by the American National Standards Institute (ANSI X3.131-1986, which is incorporated herein by reference in its entirety) of 1430 Broadway, New York, N.Y. 10018, is an example of an industry-recognized standard for a relatively complex local area network. Descriptions of the SCSI bus may be found for example in U.S. Pat. No. 4,864,291 “SCSI Converter” issued Sep. 5, 1989 to J. E. Korpi and in U.S. Pat. No. 4,905,184 “Address Control System for Segmented Buffer Memory” issued Feb. 27, 1990, to R. P. Giridhar, et al., which are incorporated herein by reference in their entirety.
Using a SCSI network, bit information can be sent from target to target in a serial manner. Often, this bit information is processed at some point during transmission or at a target unit. Although standard SCSI provides an effective means of target to target network communication, often bit information intended for parallel processing can become skewed. Specifically, bit information is often processed using parallel data pipes, or channels, each of which processing its particular bit information in a specific manner. Under some circumstances, these parallel channels can get out of sync with each other, causing the pipelined data to become skewed with respect to the other channels.
As a result, subsequent data processing can fail because data from parallel channels can be processed at the wrong time. For example, if a particular channel is faster than other parallel channels, the data from the first channel will be processed before data from the other channels. That is, data from time to will be processed from the fast channel, while data from time tn is being processed from the other channels. Thus, although subsequent processing is expecting data from the same time period from each of the data channels, in actuality, data from different time periods is being processed.
In view of the foregoing, there is a need for deskewing circuits capable of realigning skewed data from parallel channels. In addition, the deskewing circuits should be adjustable, allowing the rate of deskewing to be changed. Moreover, the deskewing circuits should be capable of determining the amount of deskew to apply to particular channels, thus allowing the deskewing circuits to “learn” the characteristics of a particular data channel.